Microsoft Accelerates Chip Design with Azure Cobalt 200 for EDA Workloads

Confirmed facts

On November 5, 2026, Microsoft announced that it is accelerating Electronic Design Automation (EDA) workloads by utilizing Azure Cobalt 200 virtual machines (VMs).

Internal tests conducted by Microsoft demonstrated significant performance gains for EDA workloads running on Cobalt 200 when compared to Cobalt 100. These workload-specific gains ranged from 38% higher throughput to a 4.15x increase in performance.

Specifically, a Calibre workload, a common EDA tool, showed approximately 23% less execution time on Azure Cobalt 200. The evaluation of EDA tools included offerings from major industry vendors such as Cadence, Synopsys, and Siemens.

Azure Cobalt 200 is purpose-built for scale-out, cloud-native, and Linux-based agentic AI workloads. Key architectural advancements in Cobalt 200 include memory encryption, built-in acceleration for compression and encryption, and higher throughput designed for data-intensive cloud services.

Technical analysis

Electronic Design Automation (EDA) workloads are fundamental to modern semiconductor development, encompassing a complex suite of tasks from initial architectural exploration and logical design to physical implementation, verification, and sign-off. These processes are characterized by their extreme computational demands, often requiring hundreds of thousands of CPU cores and terabytes of memory for tasks like full-chip simulations, formal verification, and physical design rule checks. The iterative nature of chip design means engineers frequently execute numerous simulation and verification runs, each generating vast datasets and demanding high throughput for data processing and storage. Historically, managing these workloads has necessitated significant on-premises infrastructure investments, leading to challenges such as capital expenditure, resource underutilization during off-peak times, and bottlenecks when peak demand for compute resources exceeds available capacity. The ability to scale compute resources dynamically and efficiently is a persistent challenge in the semiconductor industry.

Microsoft's Azure Cobalt 200 virtual machines (VMs) are purpose-built for scale-out, cloud-native, and Linux-based workloads, presenting architectural characteristics that directly address the inherent challenges of EDA. The "scale-out" design (inference) is particularly critical for modern EDA flows, which increasingly rely on distributing highly parallelizable tasks across numerous compute nodes. Examples include running extensive regression test suites for functional verification, executing Monte Carlo simulations for analog design, or performing distributed physical verification checks. The "Linux-based" foundation (inference) is a fundamental compatibility requirement, as the vast majority of commercial EDA toolchains from vendors like Cadence, Synopsys, and Siemens are developed and optimized for Linux environments. Furthermore, the confirmed "higher throughput for data-intensive cloud services" (fact) is directly beneficial for EDA, which involves the constant processing and movement of massive design files, intellectual property (IP) libraries, and voluminous simulation and verification results. This high throughput can mitigate I/O bottlenecks that often plague large-scale EDA deployments.

The inclusion of "memory encryption" (fact) and "built-in acceleration for compression and encryption" (fact) in Cobalt 200 directly addresses critical security and data integrity concerns paramount to intellectual property (IP) protection in chip design. EDA data, which includes proprietary design schematics, verification models, and manufacturing data, represents some of the most sensitive and valuable IP in any technology company. Memory encryption helps protect data at rest and in use within the VM environment, guarding against unauthorized access to sensitive design information during processing. Concurrently, accelerated compression and encryption capabilities can secure data in transit between compute nodes and storage, and reduce the storage footprint for large design databases, which can be gigabytes or terabytes in size. This integrated security approach is particularly relevant for cloud-based EDA adoption, where robust data protection mechanisms are a primary consideration for engineering teams migrating sensitive workloads (inference).

The confirmed performance gains demonstrated by Azure Cobalt 200—ranging from 38% higher throughput to a 4.15x improvement over Cobalt 100, and a specific 23% reduction in execution time for a Calibre workload (facts)—translate directly into tangible practical engineering consequences for chip development. For design teams, these improvements mean significantly faster iteration cycles, allowing engineers to run more design experiments, perform more thorough verification, or identify and resolve issues more quickly. This acceleration can lead to a substantial reduction in the overall design cycle time, which is a critical factor in the highly competitive semiconductor market. A faster design cycle can enable quicker time-to-market for new hardware products, providing a competitive advantage. The ability to complete complex verification or simulation tasks in less time also allows engineers to explore a broader range of design options or achieve higher verification coverage within existing project timelines, potentially leading to more robust and optimized silicon designs.

This development signifies a substantial advancement towards truly cloud-native chip design (inference). By demonstrating the capability to efficiently run demanding EDA workloads on its custom cloud silicon, Microsoft showcases a viable path for semiconductor companies to leverage the elasticity and on-demand access to high-performance computing resources offered by the cloud, without the significant capital expenditure and operational overhead associated with managing large on-premises hardware clusters. This shift enables design teams to dynamically scale their compute infrastructure to meet peak demands, then scale down during quieter periods, optimizing resource utilization and potentially reducing operational costs. Furthermore, Microsoft's strategic decision to use its own Azure Cobalt 200 to design *other* Azure silicon (fact) exemplifies a powerful vertically integrated strategy. This approach allows Microsoft to optimize its entire hardware and software stack specifically for its internal engineering needs, creating a closed-loop development and validation process. This internal dogfooding not only validates the platform's capabilities but also provides direct feedback for continuous improvement, potentially benefiting future external customers (inference).

Sources

• Microsoft Azure Blog